AC-DC Power Converters

Single Phase Full Wave Controlled Rectifier

Single Phase Half Wave Controlled Rectifier

Three Phase Full Wave Controlled Rectifier

Three phase Half controlled rectifier

Analog Integrated Circuits

Current to voltage converter

Data Converters

• Binary Weighted Resistor DAC
• Counter type ADC
• Dual Slope type ADC
• Flash Type ADC
• R-2R Ladder DAC
• Successive Approximation type ADC

Multivibrators

• Asymmetrical Square wave generator
• Bistable multivibrators
• Monostable multivibrator
• Sawtooth waveform generator
• Triangular waveform generator

Multivibrators

Asymmetrical Square wave generator

Bistable multivibrators

Monostable multivibrator

Sawtooth waveform generator

Triangular waveform generator

Op-amp Adder

Op-amp Comparators

Comparator as a Duty Cycle Controller

Comparator as a function generator

Comparator IC LM 311

Inverting Comparator

Non-Inverting Comparator

Voltage Controlled Oscillator

Window Comparator

Op-amp Integrator

Difference integral

Non-inverting integrator

Practical integrator

Summing Integrator

Peak Detector

Phase Locked Loop

PLL applications

PLL IC 565

Op-amp Differentiator

Practical differentiator

Summing differentiator

Precision Rectifier

Modified Precision Full Wave Rectifier

Non-Saturated type Precision Half wave Rectifier

Precision Full Wave Rectifier

Saturating type Precision HWR

Sample & Hold Circuit

Voltage-to-Current Converter

Schmitt Trigger

Asymmetrical Inverting Schmitt Trigger

Inverting Schmitt Trigger

Non-inverting Schmitt Trigger

Subtractor/Difference Amplifier

Voltage-to-Current Converter

Voltage Regulator

Adjustable Negative Voltage regulator ICs

Current Booster

Dual power supply

Low drop-out Voltage regulators

Series regulator using op-amp

Three terminal adjustable Voltage regulator ICs

Three Terminal Fixed Voltage regulator ICs

Voltage Regulators ICs

Combinational Logic Circuits

Arithmetic Logic Unit

Binary Adder/Subtractor

Boolean Algebra

Decoders

Demultiplexers

Encoder

Full Adder

Full Subtractor

Half-Adder

Half-Subtractor

Multiplexer

DC circuits

Energy Sources

Kirchhoff’s Current Law

Kirchhoff’s Voltage Law

Maximum Power Transfer Theorem

Mesh analysis

Nodal analysis

Norton’s theorem

Source transformations

Superposition Theorem

Thevenin’s Theorem

DC-DC converter (chopper)

Classification of Chopper

Step Down Chopper

Step up chopper

Switched Mode Power Supplies (SMPS)

Uninterruptible Power Supply (UPS)

DC-to-AC Inverter

Half Bridge DC-AC Inverter

Single Phase Full Bridge Inverter

Single PWM Inverters

Three Phase Inverter

Digital Logic Families

CMOS and TTL Interfaces

CMOS Logic family

Noise Margin

TTL Logic family

Digital Logic Gates

AND Gate

NAND Gate

NOR Gate

NOT Gate

OR Gate

XNOR Gate

XOR Gate

Electronic Components

Capacitors

• AC Analysis of Capacitor
• Capacitive Reactance
• Capacitor basics
• Capacitor charge equations
• Capacitor Types
• Capacitors in Parallel Combination
• Capacitors in Series Combination
• Colour Coding in Capacitors
• Multiple Plate Capacitor
• Parallel Plate Capacitor

Inductors

• Inductive Reactance
• Inductor Basics
• Inductors in Parallel Combination
• Inductors in Series combination
• Mutual Inductance
• Self Inductance

Resistors

Transformers

Electronic Devices

DIODES

Insulated Gate Bipolar Transistor

MOSFET

Power MOSFET

Transistors

Electronic Instruments

Digital Voltmeters

• Dual-slope DVM
• Ramp-Type DVM

Oscilloscope

• Cathode Ray Oscilloscope

Waveform Generator

Electronic Systems

Brushless DC motors

Induction motor

Public Address System

Separately Excited DC Motor

Servomotors

Stepper Motor

Number Systems

Binary Number System

Binary Numbers

Binary-to-Decimal Conversion

Decimal Number System

Decimal-to-Binary Conversion

Decimal-to-Hexadecimal Conversion

Decimal-to-Octal Conversion

Hexadecimal Number System

Hexadecimal-to-Decimal Conversion

Octal Number System

Octal-to-Decimal Conversion

Programmable Logic Devices

Complex Programmable Logic Device

Field Programmable Gate Array

Generic Array Logic

Programmable Array Logic

Programmable Logic Array

Programmable ROMs

Sequential Logic Circuits

Asynchronous counter

Counters

D Flip Flop to JK Flip Flop

D Flip Flop to SR Flip Flop

D Flip-flop

Flip-Flop Excitation Table

JK Flip Flop to D Flip Flop

JK Flip Flop to SR Flip Flop Conversion

JK Flip Flop to T Flip Flop

JK Flip-Flop – Electronics Tutorials

Parallel-in to Parallel-out (PIPO) Shift Register

Parallel-in to Serial-out (PISO) Shift Register

Serial-in to Parallel-out (SIPO) Shift Register

Serial-in to Serial-out (SISO) Shift Register

Shift Registers

SR Flip Flop to D Flip Flop

SR Flip Flop to JK Flip Flop Conversion

SR Flip-flop Electronics Tutorial

Synchronous counter

Toggle Flip-flop

Thyristor

Thyristor

Characteristics of Thyristor

Gate Characteristics of Thyristor

Ratings of Thyristor

Thyristor Commutation

Thyristor Commutation Techniques

Triggering Circuit of Thyristor

Evolution of Digital IC Technologies

IC Development Cycle

VLSI Technology

VLSI Design Flow

CMOS IC Technology

• Boundary-Scan-Standards
• Boundary-Scan
• Built-in-Logic-Block-Observer-BILBO
• Built-in-Self-Testing-BIST
• Combinational-Logic-Testing
• Controllability
• Fault-Coverage
• Fault-Modeling
• Full-Scan
• IC-Testing
• JTAG-TAP-Controller
• JTAG
• Linear-Feedback-Shift-Register-LFSR
• Need-of-Design-for-Testability
• Observability
• Partial-Scan
• Scan-Path-Testing
• Signature-Analysis
• Stuck-open-and-Stuck-short-Faults

• Hardware Description Languages
• Introduction to VHDL
• VHDL Program Format
• Structure of VHDL Program
• Data Flow Modeling
• Behavioral modeling
• Data types
• Structural modeling
• Mixed modeling
• Data Objects and Identifiers
• Hardware-Description-Languages
• Operators
• Synthesis
• Types-of-Delays
• VHDL-Program-Format
• VHDL-Simulation
• VHDL-statements

• Attributes
• Configuration-Declaration
• Configuration-Specification
• Configurations
• Function
• Generics
• Package
• Procedure
• Subprograms
• TestBench

• Adder-Subtractor
• ALU
• Carry-ripple-adder
• Comparators
• Divider
• Full-adder
• Half-adder
• Multiplier
• n-bit-adder
• Simple-Equality-Comparator
• Subtractor

• Assertion-statement
• Block-Statement
• Component-Declarations
• Component-Instantiation
• Concurrent-Signal-Assignments
• Exit-Statements
• For-generate-Statement
• Generate-Statements
• Loop-statements
• Next-statements
• Report-Statement
• Return-statements
• Wait-Statements
• When-Statement
• with-Select-Statement

• Counters
• 8-bit-Loadable-Counter
• BCD-Up-down-Counter
• Binary-Down-Counter
• Binary-up-counter
• Binary-Up-Down-Counter
• Counter-examples
• Johnson-Counter
• synchronous-asynchronous-counters
• Two-digit-counter

• Flipflops
• DFF
• D-latch
• JKFF
• TFF

• Logic-Circuits
• 3-6-Binary-Decoder
• 3-8-Binary-Decoder
• 4_1_Mux
• 4-1-Mux-using-Different Modeling-Styles
• 4-2-Priority-Encoders
• 8-3-Binary-Encoder
• 8-3-Binary-Priority-Encoder
• BCD-to-Seven-Segment-Decoder
• Binary-to-Excess-3-Code-Converter
• Binary-to-Gray-Code-Converter
• parity-checker
• Two-bit-Wide-8-1-Mux

• Logic-Gates
• AND-Gate
• NOT-Gate
• OR-Gate

• Sequential-Statements
• Case-statements
• If-generate-Statements
• Null-Statements
• Process-Statement

• Shift-Registers
• 4-bit-shift-register
• 8-bit-shift-register
• RAM
• Simple-barrel-shifter
• Universal-shift-register

Finite State Machines Topics

State Machine Fundamentals

• Analysis-of-Sequential-Circuits
• Excitation-Tables-for-Flip-Flops
• Finite-State-Machine-Diagram
• Finite-State-Machines
• Mealy-Finite-State-Machine
• Moore-Finite-State-Machine
• Need-for-State-Machines
• State-Diagrams
• State-Encoding-Techniques
• State-Machine
• State-Minimization
• VHDL-Coding-of-FSM

Algorithmic State Machines

• ASM-chart-2-bit-up-down-counter
• ASM-chart-for-signal-generator
• ASM-charts
• ASM-Chart-Tool-for-Sequential-Circuit-Design
• Design-with-Multiplexers

Asyncronous-FSM-Design

• Analysis-of-Asynchronous-Sequential-Machines
• Asynchronous-FSM
• Design-of-Asynchronous-Sequential-Machine
• Design-Procedure-for-Asynchronous-Sequential-Circuits
• Essential-Hazards
• Hazardfree-circuit
• Modes-of-Asynchronous-Sequential-Machines

FSM-Applications

• UART-Transmitter-Design
• UART-Receiver-Design
• Traffic-Light-Controller
• Simple-Traffic-Controller
• Serial-Adder
• Sequential-Counters-JKFF
• Sequential-Counters-DFF
• Sequential-Counters
• Sequence-Generator
• Sequence-Detector
• Lift-Controller

Hazards

• Detection-of-Static-Hazards
• Dynamic-Hazards
• Effects-of-Hazards
• Elimination-of-Static-Hazards
• Static-Hazards

Metastability

• JK-flipflop-State-Machine
• Metastability-measurement-setup
• Metastability-Synchronizer

Programmable Logic Devices Architectures

CLPD

Advanced-Micro-Devices-AMD-CPLDs

Altera-FLASH-logic-CPLDs

Altera-MAX-7000-CPLD

Complex-Programmable-Logic-Device-CPLDs

CPLD-Packaging

Cypress-FLASH370-CPLDs

ICT-PEEL-Arrays

Lattice-CPLDs

XC9500-CPLD-Family

FPGA

Field-programmable-gate-array-FPGA

FPGA-Programming

FPGA-Structures

XC4000-FPGA-Family

XC5200-FPGA-Family

Programmable-Logic-Devices

Application-Specific-Integrated-Circuits-ASIC

Discrete-Devices-Technology

Evolution-of-Programmable-Logic-Devices

Programmable-Array-Logic-PAL

Programmable-Logic-Array-PLA

Programmable-Logic-Device-Technology

Programmable-Read-only-Memory-PROM

Simple-Programmable-Logic-Devices-SPLD

• Clock-Jitter
• Clock-Skew

• Interconnect-Routing-Techniques
• RC-Wire-Model
• Wire-Capacitance
• Wire-Resistance
• Wiring-Parasitics

• Power-Distribution-Techniques
• Power-Optimization
• Signal-Integrity-Issues
• Supply-and-Ground-Bounce

• Design-Validation
• EMI-Immune-Design
• IO-Architectures-and-Pad-Design
• Off-Chip-Connections
• One-Phase-System
• Two-Phase-System

• Beta-Ratio-Effects
• CMOS-Inverter
• Dissipation-due-to-Direct-Path-Currents
• Dynamic-Power-Consumption
• Noise-Margin
• Power-Delay-Product-in-CMOS
• Power-Dissipation-minimization-Techniques
• Static-Power-Consumption
• VTC-CMOS Inverter
• Width-Length-Ratio-Calculation-of-CMOS

• CMOS-Design-Flow
• CMOS-lambda-Design-Rules
• Design-Rule-Check
• Inverter-Layout
• Lambda-based-design-rules
• Layout-Design-Rules
• Layout-of-logic-gates
• Micron-Design-Rules
• Stick-Diagrams
• Technology-scaling
• Types-of-Scaling

• CMOS-Process-Enhancements
• Contacts-Metalisation
• Diffusion
• Ion-Implantation
• Isolation
• Metrology
• Modern-CMOS-Technology
• n-well-Process
• Oxidation
• Photolithography
• planar-process-technology
• p-well-Process
• Silicon Crystal Growth
• Twin-tub-Process
• Wafer-Formation

• Beta-Ratio-Effects
• Current-Mirrors
• Differential-Amplifier

• Cascode-Op-amp
• Folded-Cascode-Op-amp
• Two-Stage-Op-amp

• Cascode-Amplifier
• CMOS-Inverter-as-an-Amplifier
• Common-Drain-Amplifier
• Common-Gate-Amplifier
• Common-Source-Amplifier
• CS-Amplifier-with-Active-Load
• CS-Amplifier-with-Current-Source-Load
• Current-Source-Load-Inverter
• Frequency-Response-of-CS-Amplifier
• PMOS-Load-Inverter
• Push-Pull-Inverter

• Body-Effect
• Current Sinks
• Current-Source
• C-V-Characteristics
• Enhancement-MOSFET-Physical-Structure
• I-V-Characteristics-of-PMOS-Transistor
• Linear-Region-of-Operation
• MOSFET-Small-Signal-Model
• Saturation-Region-of-Operation
• Threshold-Voltage

• Interconnect-Capacitance
• Interconnect-Delay-Model
• Interconnect-Resistance
• Parasitic-capacitance-Models
• Parasitic-Capacitances
• Parasitic-Capacitances-MOSFETS
• Source-Drain-Resistance

• Low-Noise-Amplifier
• Mixers
• Oscillator
• RF-Circuits

• ADC-Circuits
• ADC-DAC-Blocks
• DAC-Circuits
• Sampling-Analog-Signals
• Signal-Conditioning
• Signal-Quantization