CMOS IC Technology

For understanding the CMOS circuits, a working knowledge of the integrated circuit

fabrication technology is must. Here we will discuss a synopsis of the IC technology that

will help readers to have proper perspective of integrated circuit operations. IC

technology has undergone a major change since its invention in the early sixties. With

passing time, the improvements made in this technology till date have made possible

miniaturization of devices to almost unimaginable levels. The minimum feature size

(MFS) or minimum line width (MLW), which is the minimum dimension that can be

resolved in an IC chip, has reduced from more than 10mm in early eighties to only

0.12µm in 2005. With shrinking device sizes over the last forty years or so, the level of

integration (which is defined as the number of devices that can be packed in an IC chip)

is increased from SSI (Small Scale Integration -1 to 10 devices per chip, in the sixties) to

MSI (Medium Scale Integration-10 to 100 devices per chip, in the seventies) to LSI

(Large Scale Integration-100 to 10,000 devices per chip, in the eighties) and now to

VLSI (Very Large Scale Integration-more than 10,000 devices per chip). For extremely

high packing density of the order of hundreds of million devices per chip, another

nomenclature ULSI (Ultra Large Scale Integration) was coined, however, this term did

not become popular, instead, people stuck with the term VLSI. Such, a large integration

of devices was possible only because of the invention of CMOS technology. The

important advantages of this technology are the lower power dissipation and small area

of MOSFET device which leads to higher packing density. The complementary

MOSFET (CMOS) technology employs both n-channel and p - channel transistors to

form logic circuits. The advantages of CMOS technology over the bipolar technology

are :

(1) The nature of the CMOS circuits allows it to operate with low power hence higher

integration density is possible.

(2) A MOSFET occupies a smaller area than a BJT which leads to higher circuit


(3) A MOSFET has very high input impedance and can be modelled as a switch. This

feature simplifies the design and analysis of CMOS logic circuits.

(4) CMOS circuits have the largest logic swings and thus excellent noise margins.