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Push Pull Inverter :

Figure below shows the circuit diagram of the push pull inverter circuit. In this configuration the gates of the two transistors are connected together and the input signal is applied at this combination. Also, the drains of the both PMOS and NMOS transistors are shorted together and the output response is measured at this combination.

The small signal equivalent circuit of this configuration is shown in Figure below

By applying KCL,

We get, g_m1 V_GS + + g_m2 V_GS + = 0

g_m1 V_in + + g_m2 V_in + = 0

(g_m1 + g_m2) V_in = - V_out

\ = -

\ A_n = -