Home > vlsi projects > Proj 70 Low Drop Out Voltage Regulator

Project Title: Low Drop-Out Voltage Regulator

Brief Introduction:

A Low-Voltage Low-Dropout (LDO) Voltage Regulator which will run having a truly input–Output that is little Differential Voltage with nm CMOS technology in modification increasing the Packing Density, offers the approaches brand name that will be towards power administration is proposed. An easy Symmetric Operational Trans-Conductance Amplifier can when be used the Error Amplifier (EA), by having a splitting that is present used to improve the gain. This also improves the closed-loop bandwidth connected with LDO Regulator. An electric noise Cancellation Mechanism is within the rail-to-rail production stage of this EA Created, minimizing the size of the charged power MOS transistor. These benefits make it possible for the proposed LDO Regulator to go beyond a wide range of running conditions while achieving efficiency that is maximum is current less output variation for Lots that is adjustable, and Power that is effectively appreciable provide Ratio. The positioning that is compact of proposed LDO regulator leads to a area that is chip drop-out that is low Regulator which discovers its applications for portable gadgets, i.e. cellular phones, pagers, laptop computers, etc.

Hardware Details:

  • Error Amplifier
  • Common Source Amplifier
  • Current-sourcing PMOS

Software Details:

  • VERILOG compiler

Block Diagram:

For more details