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Width /Length Ratio Calculation of CMOS :

  • The switching threshold Vm is the point where Vin = Vout and can be obtained graphically from the intersection of the VTC with the line given by Vin = Vout (see Fig. 7.5.6).
  • In this transition region, both PMOS and NMOS transistors are operated in saturation region.
  • Therefore, the analytical expression for Vm can be obtained by equating the currents through the PMOS and NMOS transistors. In order to derive this equation, it has been assumed that velocity saturation occurs (i.e. VDSAT < VM – VT ).
  • Further, it has been assumed that, the channel length modulation effects are not present. Here, kn= n and kp= p.

    kn VDSATn VM – VTHn – VDSATn2 + kp VDSATp Vm – VDD – VTHp – VDSATp2 = 0 ...(7.7.1)

    Solving for Vm

    Vm = VTHn+ VDSATn2 + r VDD + VTHp + VDSATp21 + r …(7.7.2)

    With r = kp VDSATp kn VDSATn = satp Wpsatn Wn

  • Furthermore, by assuming equal oxide thickness for PMOS and NMOS transistors. For large values of VDD (compared to threshold and saturation voltages) Equation (7.7.2) can be simplified as,

    Vm  rVDD1 + r ...(7.7.3)

  • The Equation (7.7.3) shows that, the switching threshold can be set by the ratio r, which compares the driving strengths of the PMOS and NMOS transistors. Therefore, Vm is located around the middle of the voltage swing or at VDD2 and r approximately 1, which is equivalent to sizing the PMOS device so that,

    WLp = WLn  (VDSATn kn) (VDSATn kp) ...(7.7.4)

  • From Equation (7.7.1), the ratio of PMOS versus NMOS transistor sizes is given by,

    (W/L)p(W/L)n = kn VDSATn (Vm – VTHn – VDSATn /2) kp VDSATp (VDD – VM – VTHp + VDSATp/2) ...(7.7.5)