Project Title: UTMI AND PROTOCOL LAYER FOR USB2.0
Along with the advancement in hardware technology, FPGA presence that is entering able to accommodate faster and more powerful gadgets for the unit that is single. IP Cores have been developed to enable design reuse, increasing functionality, performance and freedom. USB is a mentor that is serial can understand the Plug and play function for easy connection of peripherals to PCs. It is a point that is genuine aim program by which information cost of over 480Mbit/s are relocated depending on completely new USB 2.0 Specification. It gives bi-directional, low- expense and rate that is computer software that is high information transfer. Numerous products could possibly be attached by using a hub towards the host. The USB correspondence implemented complies with USB 2.0 specifications required for basic information transfer that can operate at USB rate that is complete 12 Mbit/s and rate that is high480Mbit/s.
* Spartan 3e FPGA from Xilinx
* Xilinx ISE (integrated software environment) 10.1 software