Isolation component of integrated circuit processing provide electrical isolation between the devices and provides undesired device interactions such as latch up in CMOS. Isolation has conventionally been achieved by the LOCOS (Local Oxidation of Silicon) structure, but because of the well known scaling problem such as “birds beak†regions, new isolation technique such as trench isolation is essential for highly scaled CMOS. The ability to implement improved isolation is essential to achieving the full benefits of increased scaling interms of packing density.