The SRAM-based XC5200 Field-programmable gate array family is designed to deliver low cost. The features of this family are, 1) SRAM based reprogrammable architecture. 2) Versatile I/O and packaging and 3) Supported by Xilinx development system. Figure below shows the simplified, block diagram of the XC5200 architecture. The XC5200 devices consists of programmable input/output block, programmable logic blocks, and programmable interconnect. However, the logic and routing resources of these devices are combined by flexible Versa-blocks and General Routing Matrix.
Fig_XC5200 FPGA Family