Project Title: Speeding-Up Fault Injection Campaigns on Safety-Critical Circuits
Brief Introduction:
In this paper we describe a strategy that is fault that is fpga-based is speed-up promotions for the assessment with this fault-tolerance of VLSI circuits. Suitable methods are proposed, allowing emulating the results of faults and behavior that is watching is defective. The proposed approach combines the effectiveness of hardware-based techniques, as well as the flexibleness of simulation-based practices. Experimental outcomes are offered showing that significant speedup figures may be achieved with respect to fault that is advanced is techniques that are simulation-based. Throughout the years being last we've seen a fascination that keeps growing practices for validating the fault limit properties of safety-critical applications ( such as for instance railway traffic control, aircraft journey, telecommunications, and others) where expense dilemmas mandate the utilization of professional elements which are off-the-shelf (COTS). Aside use of COTS elements, the increase that is constant the integration level of electronic circuits is making it increasingly tough to make sure a quantity that is satisfactory of, as a result of greater risk of event of transient faults (often modeled as soft errors) that may significantly impact the behavior of the system. The reduction in the magnitude associated with the expenses which can be electric to hold and keep info is truly increasing the likelihood that alpha particles and neutrons striking the circuit could introduce errors being transient its behavior for instance
Hardware Details:
* FPGA-Based Fault Injection
* FPGA-Based Fault Injection Manager
Software Details:
* commercial RT-level VHDL simulator
* Xilinx platform
Block Diagram: