Project Title: Floating point Arithmetic Logic Unit

Brief Introduction:

VHDL environment for drifting point logic and arithmetic item design usage that is making of is introduced; the novelty within the ALU design. Pipeling provides a performance that is high. Pipelining may be utilized to perform tips which are numerous. In top-down design approach, four modules being addition that is arithmetic subtraction, multiplication and device are combined to create A point that is unit that's floating. Each module is split into sub- modules. Two selection bits are combined to choose a within the ALU design are realized use that is making of, design functionalities are validated through VHDL simulation. Synthesis and simulation result learn into the Xilinx12.1i platform.

Hardware Details:

• ALU
• Altera FLEXIOK:EPFIOKIOLC,
• FPGA chip on LC -84

Software Details:

• Xilinx12.1i platform
• VHDL

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