Project Title: I²C Bus Controller

Brief Introduction:

This task is concerned utilising the design of I2C bus controller and the software involving the I2C items i.e. microcontroller (AT89C51) and EEPROM (AT24C16). The I2C can be a two cable serial protocol. The elements that are I2C be interfaced using just two lines. First one is Serial information second and line is clock line. The design architecture comprises of a master controller and a servant. The master produces the situation that is starting SCL is high and SDA is having a noticeable change from high to low. Master also generates STOP condition whenever SCL is in high and SDA is having a transition from low to high. Beside these two functions master also transfers and gets information to/from different servant devices. The microcontroller and EEPROM are interfaced through I2C bus. Data send, read and write particularly these operations are carried out and the behavior of I2C protocol is analyzed. By explaining the style in HDL, practical verification for the design can be achieved at the beginning of the design cycle.

Since designers work with the known degree that is high, they might optimize and alter the appearance module until it fulfills the functionality that's needed is. The test workbench system has to be developed to test the look module. The input is distributed by the test workbench to the design module & verifies the outputs. The test bench needs to be written method that is such check the design module generally in most feasible conditions.

Hardware Details:

• microcontroller (AT89C51)
• EEPROM (AT24C16).
• I2C BUS CONTROLLER

Software Details:

• verilg HDL

* KEIL Micro vision 3 software tool

• C language

Block Diagram:

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